Actions

FPGAExercise5: Revision history

View logs for this page (view abuse log)

Diff selection: Mark the radio buttons of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

19 November 2009

11 November 2009

  • curprev 20:0320:03, 11 November 2009‎ Williamgibb talk contribs‎ 5,061 bytes +5,061‎ Created page with 'Homework/Verilog Coding problems == An Upcounter design == An upcounter can be made with 3 elements - DFFs, XOR and AND gates. The equations for a simple upcounter are a chain…'
Retrieved from "https://wiki.hacdcserver.org/index.php/FPGAExercise5"